In every antenna of the ALMA array, the digitizers
will deliver 3-bit (or more) samples at the rate of 4 Gigasamples per second.
Data is not practical to handle at this speed and needs to be converted
to a lower frequency by means of serial-to-parallel conversion. To solve
this problem the telecomm industry has developed fast "mux/demux" chips,
which unfortunately are single-bit devices. If we use 3 (or more) of them,
a synchronisation problem arises. The right way of solving this problem
would be to design a chip including 3 (or more) demultiplexers on
the same die. Should this approach be found not economical for ALMA, this
paper describes a method for synchronizing several single-bit commercial
demultiplexers.
A prototype circuit including two single-bit
devices has been built and successfully tested. The measured timings for
acquisition and recovery are presented.
View a pdf version of ALMA Memo 383.
Download a ps version of ALMA Memo 383.
Last modified: 2001/07/27
alma-memos@nrao.edu