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ALMA MEMO #426
4-Gsample/s, 2-bit SiGe Digitizers for the ALMA Project. Paper II
David Deschans 1,2, Jean-Baptiste Begueret 1, Yann Deval 1, Pascal Fouillat 1,
Alain Baudry 2, Guy Montignac 2
1 Laboratoire IXL, Universite de Bordeaux, 351 Cours de la
liberation, 33405 Talence, France
2 Observatoire de Bordeaux, BP 89, 33270 Floirac, France
2002/05/16
Keywords: Analog-to-digital converter (ADC), SiGe technology, high
speed bandpass ADC
We report on the design details and first dynamic tests of high speed
analog-to-digital converters (ADC) with characteristics approaching
those desired for the ALMA project. A conventional flash ADC
architecture has been adopted with monolithic ADCs implemented in
BiCMOS 0.35 um and 0.25 um SiGe (Silicon-Germanium) processes. We
concentrate here on our 2-bit, 0.35 um designs and test results,
while details on our 3-bit designs and 0.25 um SiGe technology will
be given in another paper. The main features of these 2-bit ADCs are
4 GHz clock rate, 3 quantization levels, and an input bandwidth from
2 GHz up to 4 GHz. The two chips tested in this work dissipate 650
and 975 mW under 2.5 V supply; the die areas are 5.4 mm2 and 6.5 mm2,
respectively.
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Last modified: 2002-05-29
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